[TenTec] Keying delays/timing

[Ken Brown <ken.d.brown@hawaiiantel.net>]

> So why then do the manufacturers design the T/R switching with this delay?  Is 
> it to avoid hot switching in the amplifier should one be used.
>
> Not really. This delay is necessary to permit settling of the DSP circuitry 
> when switching from receive to transmit.
There are many reasons not related to DSP rigs. Some examples:

In the simplest CW transmitters, if the oscillator is keyed it may be 
necessary to delay and shape the keying of a following stage to prevent 
key clicks or chirp.
A transceiver with only one VFO being used for both TX and RX may need 
to shift the VFO between TX and RX, for RIT, (or not RIT, but just to 
have your TX frequency equal to the signal you are listening to when it 
is not tune for a zero beat audio tone). Or it may need to switch 
between two different BFO/carrier oscillator frequencies for transmit 
and receive. If the transmission starts too soon there could be a chirp.
A transceiver that uses a PLL system may need to change the frequency of 
one or more PLLs  between TX and RX. There are many tradeoffs that are 
made in PLLs to make them work acceptably. If the loop gain is high 
enough for super fast frequency switching it may have high phase noise. 
A lower loop gain can reduce phase noise, but require longer time to 
lock to a new frequency. If the transmission starts to soon there may be 
something similar to a chirp while the PLL settles.
It may require some time to mute the receiver without causing an audio 
thump. Best to delay transmitting until the receiver is fully muted.
DE N6KB

_______________________________________________
TenTec mailing list
TenTec@contesting.com
http://lists.contesting.com/mailman/listinfo/tentec