So the clip point is 134 dB, not 140 dB.
Thus, a 134 dB above 2 uV signal, 10 KHz away from my desired 2 uV CW signal,
will have no impact on my ability to receive that CW signal so long as I have
selected a received bandwidth less than or equal to 10 KHz…
Right?
Gary
> On Sep 11, 2016, at 5:28 PM, Carl Moreschi <n4py3@earthlink.net> wrote:
>
> Sure you will have problems. You have now exceeded the clip point. For the
> Flex 6500 that's S9+80.
>
> Carl Moreschi N4PY
> 58 Hogwood Rd
> Louisburg, NC 27549
> www.n4py.com
>
> On 9/11/2016 6:26 PM, Gary J FollettDukes HiFi wrote:
>> Now we’re getting somewhere.
>>
>> SO, if you sample the voltage appearing at the output of a given RF input
>> stage, and it is, say, 2 uV after scaling for whatever gain is in the front
>> end, and the A to D LSB size.
>>
>> If I leave that 2 uV signal (the one I am trying to hear) at the input, and
>> then apply 30 million microvolts (30 volts, which is143 dB over 2 uV) at
>> another in band frequency, I will not experience any digitization problems?
>>
>> Gary
>>
>>
>>
>>> On Sep 11, 2016, at 5:10 PM, Paul Christensen<w9ac@arrl.net> wrote:
>>>
>>>> "It still does not explain how you can digitize a signal with amplitude
>>> that is 140 dB signal above one LSB using a 16 bit A to D."
>>>
>>> You're incorrectly applying bit strength based on strictly on voltage. We
>>> cannot use the classic format for dynamic range where DR = 20 log2^ (bit
>>> strength). That gives 96 dB of DR for a 16 bit voltage based system where
>>> other factors like ADC clock rate and bandwidth are important.
>>>
>>> Example: the SunSDR Colibri receiver has a 14 bit ADC. Like all DDC
>>> receivers, it achieves its DR through the process of decimation and
>>> filtering. If a 14 bit ADC is sampling at 80 Msps with decimation occurring
>>> to a 500 Hz bandwidth, then there's an increase of DR by 10 log(80^e6/500).
>>> That's 53 dB. SunSDR uses an ADC used that's specified with a 77 dB SNR at
>>> 15 MHz. With decimation, the dynamic range is increased to 77 dB + 53 dB =
>>> 130 dB.
>>>
>>> How about a 16-bit receiver that's rated with a 77 dB SNR at 30 MHz. Assume
>>> the ADC is clocking at 125 Msps. 10 log(125^e6/500) = 54 dB. After
>>> decimation, DR is 77 dB + 54 dB = 131 dB.
>>>
>>> We gained only 1 dB of DR by going from a 14-bit ADC to a 16-bit ADC. This
>>> is exactly why folks have been saying it doesn't make a difference in nearly
>>> every amateur application. There may be other design factors to consider
>>> but DR isn't one of them. The ANAN-100B has nearly the same DR as the more
>>> expensive ANAN-100D. One product uses a 14 bit ADC, the other is 16 bit.
>>> Let's stop treating the subject like we're calculating the DR of a CD
>>> player.
>>>
>>> Paul, W9AC
>>>
>>>
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