Jack,
That's interesting. My 160m problem only showed up when the ambient
temperature in the shack was high!
Whilst fault-finding I used "freeze it" spray, and a hair-drier, to try
to invoke the symptoms. I noticed that when the hair-drier was played on
the crystals I could get similar symptoms on other bands than 160m. Mind
you it was a pretty severe test.
I never did find a fault, as such; re-setting the 160m crystal frequency
seemed to improve things, although a good blast from the hair-drier
would still make the loop lose lock. What confused me, and still does,
is that I didn't see a steady change in loop control voltage as the temp
increased, followed by loss of lock. It just seemed to suddenly go, as
if one of the loop control components had changed in value. But then,
why just a problem on 160m?
Like you, I'm just living with it as it is. As long as the shack
temperature doesn't get too high everything is fine.
73,
Steve G3TXQ
Jack Mandelman wrote:
> Steve,
>
> Thank you for the info on how you accessed the LO coils. I made a copy for
> future reference. Since my problem occurs (so far) only when it's
> extraordinarily warm in the shack, I'm postponing any attempted repair.
>
> 73,
>
> Jack K1VT
>
> _________________________________________________________________________________________________________________________
>
> Jack,
>
> It's a few months since I had the same problem with my Omni VI on 160m.
> If I remember correctly I was able to unbolt the FM and Driver boards
> and flip them carefully to one side to get access to the mixer board. I
> put a piece of thick paper under them to prevent shorts to the chassis
> in their temporary position. I believe there was also at least one lead
> I left disconnected from these boards to allow them to "flip" out of the
> way, but which had no effect on the basic functioning of the Tx/Rx. It
> should be obvious which they are.
>
> There was a useful posting a few months ago on the list about how to
> adjust the Crystal. It involved monitoring the pulse width on the PLL
> chip. I did mine by monitoring the PLL control voltage, but I did find
> that setting it mid-way between the 2 lock points didn't always give
> best results. So the pulse width method is probably the way to go.
>
> And as others have said, be careful of those cores - I cracked one, and
> then the whole board has to come out!
>
> 73,
> Steve G3TXQ
>
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>
>
>
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