>So it appears that maybe they screwed up the keying inorder to reduce the
>chirp. I will find out for sure Sunday. I plan to exchange his chip for
> mine and see what happens. If anyone else out there knows anything about
this, please chime in!
It turns out there's an easy way to rule out PLL timing issues and whether
you're on logic chip V1.02, V1.03 or any other logic chip for that matter...
If you remove the back TX OUT to TX EN jumper and plug the output of your
key or keyer directly into TX EN, you will effectively bypass all timing
circuits (look at the schematic and you will see that all system timing is
resolved at the TX OUT jack), leaving only hardware issues to resolve. In
my case, the microchirp was not related to PLL timing or any other software
issues. The problem persisted regardless of whether I keyed TX EN or the CW
KEY jacks. Note that you will loose side-tone during this test as the ST is
a software function.
It's a quick and easy test. Let us know what you find.
-Paul, W9AC
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