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Re: [RTTY] Improved Pseudo FSK Keying circuit for 2Tone

To: rtty@contesting.com
Subject: Re: [RTTY] Improved Pseudo FSK Keying circuit for 2Tone
From: "Joe Subich, W4TV" <lists@subich.com>
Date: Sat, 15 Mar 2014 11:09:06 -0400
List-post: <rtty@contesting.com">mailto:rtty@contesting.com>

Remarkably similar to the system used in microHAM DigiKeyer II except
in DK II the monostable function is performed by the processor rather
than a discrete circuit.

73,

   ... Joe, W4TV


On 3/15/2014 10:28 AM, David G3YYD wrote:
The system of transformers, diodes and smoothing capacitors is far from
ideal as proposed by the Fldigi team. The system proposed here costs less
and has virtually no keying bias at all. It has very accurately timed bits
and stop lengths unlike EXTFSK or keying from many serial port cards.

The rectifier smoothing system causes significant keying bias. Hence 2Tone
use of 5Khz with smaller capacitors to reduce this bias. Although I have
never mentioned it before there is a much better way to generate the FSK
keying signal from the pseudo FSK signals that 2Tone and Fldigi generate.

Take the signal output from the sound card via a blocking capacitor into the
non-inverting input of an op-amp, which is biased at a fraction less than
half the supply voltage. (The slightly less is to ensure with no tone the op
amp does not switch on noise.)

The op amp has its inverting input biased at half its supply voltage. The op
amp has no feedback resistor and must be able to switch between ground and
supply rail. A comparator could be used in place of the op-amp.

The op-amp output is fed into the positive going trigger input of a
retriggerable monostable with its delay setting at 10% longer than one cycle
of tone - 220uS for 2Tones 5KHz. The Q output from the retriggerable
monostable goes via a resistor to the base of the keying transistor. Use the
NOT Q output to invert the keying sense. It is important that the retrigger
time is greater than one cycle time of tone.

A more sophisticated version would use a full wave op amp rectifier then the
comparator then the mono stable with delay time set at  110usec. However
this is not really necessary.

Op-amp and the monostable will need to use the same supply voltage, which if
CMOS is used could be the filtered shack 13.8v supply. Could even use a TO92
9v IC regulator with its decoupling capacitors. Stabilising the supply makes
the delay timing stable against supply volts.

In CMOS a retriggerable monostable would be a HEF4528B or equivalent
CD4528BC. The data sheet can be found here:
<http://www.nxp.com/documents/data_sheet/HEF4528B.pdf>
http://www.nxp.com/documents/data_sheet/HEF4528B.pdf

This is a dual retriggerable mono so if using SO2R can use the other half
for the other rig along with a dual op-amp. Then just 2 ICs plus 2
transistors costing pennies for SO2R FSK keying. Cheaper than a serial port.

The keying bias is very low it will be the monostable's delay time less
200uS (one cycle of tone at 5KHz). So with a 220uS delay that is an error of
20uS in 22mS or <0.1%. The distortion caused by TX and RX filtering will be
a lot higher than this. It will also work well at 75 baud.

Personally I always use AFSK so have not developed such a circuit but
someone else might want to do this and publish it.

73 David G3YYD



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