Duane,
Doing "it right" is a whole lot more than just matching the input and
output impedances. Issues such as IMD, thermal heat transfer, and
protection against overdrive and reflected power are more difficult in
my opinion. Nevertheless I would like to encourage any one who actually
wants to build something rather than just talk about it.
The answer to your question is fairly easy to understand if we take it
in steps:
I assume you are looking at Philips app. note NCO8703 section 3.2. The
formula you have gives the R for a single FET. Notice that for the 300W
amp they use 150W in the formula. Considering these caveats the formula
is correct and for a 50V power supply they come up with 6 ohms for R.
However in the next sentence they immediately double R to account for 2
FETs. This is somewhat convoluted. Bottom line is that the output
matching network matches from 12 ohms to 50 ohms.
Let's look at it a little differently:
1.) The amplifier topology is push-pull.
2.) Looking at the drain of each FET (which are out of phase) to ground,
the maximum possible voltage goes from approximately zero to almost
twice the power supply voltage which let's call Vds to match your example.
3.) To keep the amplifier efficient but not clipping a reasonable output
voltage swing from the drain to ground at each FET is approximately 85%
of the maximum swing. Therefore the output peak to peak voltage from
the drain to ground is 2*0.85*Vds.
4.) Combining the output of the the 2 FETs doubles the available voltage
that can produce power or 4*0.85*Vds volts peak to peak.
5.) Dividing this number by 2 gives Vpeak and dividing again by sqrt(2)
gives the rms voltage which is what we want. Therefore Vrms is
sqrt(2)*0.85*Vds.
6.) If the amp is to produce 300W and Vds = 50V then R = Vrms^2 / P = (
sqrt(2) * 0.85 * Vds )^2 / 300 = 12 ohms which is exactly what they got
in the app note.
Hope this helps. The input matching is never very efficient if you are
trying to build a broadband amplifier. This is due to the input
capacitance of the FETs which is VERY significant. Plan on swamping
this capacitive reactance with resistors and remember that feedback from
the drain to gate lowers input impedance even more (but is good for IMD
and gain stability) and that source degeneration increases the input
impedance (again good for IMD and stability) but it is often very hard
to lift the source leads away from ground depending on the physical
package the FETs are in.
Good luck and do your experimenting with a good current limited power
supply which will save you more than once as you get going.
73.
Larry, W0QE
On 1/4/2011 6:34 PM, Duane Brantley wrote:
> Hello everyone,
>
> I'd like to build a solid-state HF amp using FET's, but want to do it
> right. I want to match the input and output impedance as best as I can.
> But, in doing research, the first thing I ran into is: How do you determine
> this? I can't seem to find any equations for the input and two for the
> output: 1) standard Ohm's Law - R=E^2/P and 2) In a NXP (Phillips) app note
> on making a 300 watt push-pull HF amp using BLF177 MOSFET's, they use Rload
> = (0.85*Vds)^2/2Po<-- Why twice the Po? Does anyone have any insight on
> this? Are there any formulas for the input impedance?
>
> My first amp will be the 300 watt BLF177 amp, but I want to better
> understand what is going on.
>
> Thanks,
> Duane - W4DMB
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>
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