Marv says:
> In this implementation, energy storage, to filter the AC line, is
>provided by a 4000 uF / 450 V capacitor at the output of the PFC. This
>provides the "power" and all that the small output cap is required to do
>is pacify the edges of the output converter which is already very close
>to being a "DC" signal.
Marv, am I correct in thinking that the feedback loop for regulation comes
from the final output? If so, I think I'm correct in saying that the loop
bandwidth has to be wide enough to keep the impedance low up up to several
kHz so that the DC-DC converter regulation is cancelled out. And doesn't the
4000mFd/450volt capacitor (do you really mean 4000mFd, not 400mFd?)have to
handle a pretty hefty ripple current? What sort of order of loop bandwidths
do these devices usually use, anyway?
Sounds a 'challenging project'........professionally, that means that it
probably can't be done anyway, but certainly not in the time scale and with
the resource that the boss is going to allocate!
The filters on the input aren't likely to be negligible, either....
73
Peter G3RZP
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